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| author | Dmitry Preobrazhensky <d-pre@mail.ru> | 2022-07-15 13:11:59 +0300 |
|---|---|---|
| committer | Dmitry Preobrazhensky <d-pre@mail.ru> | 2022-07-15 13:11:59 +0300 |
| commit | 2a6532d542e1775bae1af6884fa7760a38a3c451 (patch) | |
| tree | 4397bf3572af32ef207574b22161ca27af4e8bb2 /llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h | |
| parent | 30c2406e270cc5dab8da813ce5c54e4bb8c40e49 (diff) | |
| download | llvm-2a6532d542e1775bae1af6884fa7760a38a3c451.zip llvm-2a6532d542e1775bae1af6884fa7760a38a3c451.tar.gz llvm-2a6532d542e1775bae1af6884fa7760a38a3c451.tar.bz2 | |
[AMDGPU][MC][GFX11] Correct disassembly of *_e64_dpp opcodes which support op_sel
These opcodes cannot be disassembled because op_sel operand is missing - it must be added manually.
See https://github.com/llvm/llvm-project/issues/56512 for detailed issue analysis.
Differential Revision: https://reviews.llvm.org/D129637
Diffstat (limited to 'llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h index 31869f0..d17e2d8 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h @@ -162,6 +162,7 @@ public: DecodeStatus convertSDWAInst(MCInst &MI) const; DecodeStatus convertDPP8Inst(MCInst &MI) const; DecodeStatus convertMIMGInst(MCInst &MI) const; + DecodeStatus convertVOP3DPPInst(MCInst &MI) const; DecodeStatus convertVOP3PDPPInst(MCInst &MI) const; DecodeStatus convertVOPCDPPInst(MCInst &MI) const; |