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author | John Brawn <john.brawn@arm.com> | 2017-05-26 13:59:12 +0000 |
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committer | John Brawn <john.brawn@arm.com> | 2017-05-26 13:59:12 +0000 |
commit | 9009d2905debfc210859e5d20a1fb3ec319a9ce7 (patch) | |
tree | 93ad3b86753bdbce6d9657acf75739ae0d92f12d /llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | |
parent | ba9d8ba82aab927dd8e132c947cd64efff4e09d1 (diff) | |
download | llvm-9009d2905debfc210859e5d20a1fb3ec319a9ce7.zip llvm-9009d2905debfc210859e5d20a1fb3ec319a9ce7.tar.gz llvm-9009d2905debfc210859e5d20a1fb3ec319a9ce7.tar.bz2 |
[ARM] Fix lowering of misaligned memcpy/memset
Currently getOptimalMemOpType returns i32 for large enough sizes without
checking for alignment, leading to poor code generation when misaligned accesses
aren't permitted as we generate a word store then later split it up into byte
stores. This means we inadvertantly go over the MaxStoresPerMemcpy limit and for
memset we splat the memset value into a word then immediately split it up
again.
Fix this by leaving it up to FindOptimalMemOpLowering to figure out which type
to use, but also fix a bug there where it wasn't correctly checking if
misaligned memory accesses are allowed.
Differential Revision: https://reviews.llvm.org/D33442
llvm-svn: 303990
Diffstat (limited to 'llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions