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authorMatthew Simpson <mssimpso@codeaurora.org>2016-04-27 18:21:36 +0000
committerMatthew Simpson <mssimpso@codeaurora.org>2016-04-27 18:21:36 +0000
commit622b95be7b0b49e6e428cff3bc7759bc544994aa (patch)
tree1c53075e5328b3bc17f91aa0d720bab2bb06b874 /llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
parentccd318dc7ec4365ea03a68d7fe13929ea0b1b3c8 (diff)
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[LV] Reallow positive-stride interleaved load groups with gaps
We previously disallowed interleaved load groups that may cause us to speculatively access memory out-of-bounds (r261331). We did this by ensuring each load group had an access corresponding to the first and last member. Instead of bailing out for these interleaved groups, this patch enables us to peel off the last vector iteration, ensuring that we execute at least one iteration of the scalar remainder loop. This solution was proposed in the review of the previous patch. Differential Revision: http://reviews.llvm.org/D19487 llvm-svn: 267751
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