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| author | Craig Topper <craig.topper@intel.com> | 2020-09-08 10:49:32 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2020-09-08 10:50:59 -0700 |
| commit | e6bb4c8e7b3e27f214c9665763a2dd09aa96a5ac (patch) | |
| tree | f1e4af38a2cd53884ead833a411de6cf33bdfa52 /llvm/lib/Support/X86TargetParser.cpp | |
| parent | 1f870bd9284ad55dff96ab6f99afd92fd5f294be (diff) | |
| download | llvm-e6bb4c8e7b3e27f214c9665763a2dd09aa96a5ac.zip llvm-e6bb4c8e7b3e27f214c9665763a2dd09aa96a5ac.tar.gz llvm-e6bb4c8e7b3e27f214c9665763a2dd09aa96a5ac.tar.bz2 | |
[X86] SSE4_A should only imply SSE3 not SSSE3 in the frontend.
SSE4_1 and SSE4_2 due imply SSSE3. So I guess I got confused when
switching the code to being table based in D83273.
Fixes PR47464
Diffstat (limited to 'llvm/lib/Support/X86TargetParser.cpp')
| -rw-r--r-- | llvm/lib/Support/X86TargetParser.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Support/X86TargetParser.cpp b/llvm/lib/Support/X86TargetParser.cpp index a5af985..b7d9bd4 100644 --- a/llvm/lib/Support/X86TargetParser.cpp +++ b/llvm/lib/Support/X86TargetParser.cpp @@ -529,7 +529,7 @@ static constexpr FeatureBitset ImpliedFeaturesAVX5124FMAPS = {}; static constexpr FeatureBitset ImpliedFeaturesAVX5124VNNIW = {}; // SSE4_A->FMA4->XOP chain. -static constexpr FeatureBitset ImpliedFeaturesSSE4_A = FeatureSSSE3; +static constexpr FeatureBitset ImpliedFeaturesSSE4_A = FeatureSSE3; static constexpr FeatureBitset ImpliedFeaturesFMA4 = FeatureAVX | FeatureSSE4_A; static constexpr FeatureBitset ImpliedFeaturesXOP = FeatureFMA4; |