diff options
| author | Freddy Ye <freddy.ye@intel.com> | 2020-08-25 12:27:02 +0800 |
|---|---|---|
| committer | Freddy Ye <freddy.ye@intel.com> | 2020-08-25 14:21:21 +0800 |
| commit | e02d081f2b60b61eb60ef6a49b1a9f907e432d4c (patch) | |
| tree | 6acdb55674c1233cdfdf4867e64d0bff7fb5f3fe /llvm/lib/Support/X86TargetParser.cpp | |
| parent | 7f426c65b06f2d19546b2d50fccc15de9dde3d85 (diff) | |
| download | llvm-e02d081f2b60b61eb60ef6a49b1a9f907e432d4c.zip llvm-e02d081f2b60b61eb60ef6a49b1a9f907e432d4c.tar.gz llvm-e02d081f2b60b61eb60ef6a49b1a9f907e432d4c.tar.bz2 | |
[X86] Support -march=sapphirerapids
Support -march=sapphirerapids for x86.
Compare with Icelake Server, it includes 14 more new features. They are
amxtile, amxint8, amxbf16, avx512bf16, avx512vp2intersect, cldemote,
enqcmd, movdir64b, movdiri, ptwrite, serialize, shstk, tsxldtrk, waitpkg.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D86503
Diffstat (limited to 'llvm/lib/Support/X86TargetParser.cpp')
| -rw-r--r-- | llvm/lib/Support/X86TargetParser.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Support/X86TargetParser.cpp b/llvm/lib/Support/X86TargetParser.cpp index 680ec91..a5af985 100644 --- a/llvm/lib/Support/X86TargetParser.cpp +++ b/llvm/lib/Support/X86TargetParser.cpp @@ -195,6 +195,11 @@ static constexpr FeatureBitset FeaturesICLServer = static constexpr FeatureBitset FeaturesTigerlake = FeaturesICLClient | FeatureAVX512VP2INTERSECT | FeatureMOVDIR64B | FeatureMOVDIRI | FeatureSHSTK; +static constexpr FeatureBitset FeaturesSapphireRapids = + FeaturesICLServer | FeatureAMX_TILE | FeatureAMX_INT8 | FeatureAMX_BF16 | + FeatureAVX512BF16 | FeatureAVX512VP2INTERSECT | FeatureCLDEMOTE | FeatureENQCMD | + FeatureMOVDIR64B | FeatureMOVDIRI | FeaturePTWRITE | FeatureSERIALIZE | + FeatureSHSTK | FeatureTSXLDTRK | FeatureWAITPKG; // Intel Atom processors. // Bonnell has feature parity with Core2 and adds MOVBE. @@ -342,6 +347,8 @@ static constexpr ProcInfo Processors[] = { { {"icelake-server"}, CK_IcelakeServer, FEATURE_AVX512VBMI2, FeaturesICLServer }, // Tigerlake microarchitecture based processors. { {"tigerlake"}, CK_Tigerlake, FEATURE_AVX512VP2INTERSECT, FeaturesTigerlake }, + // Sapphire Rapids microarchitecture based processors. + { {"sapphirerapids"}, CK_SapphireRapids, FEATURE_AVX512VP2INTERSECT, FeaturesSapphireRapids }, // Knights Landing processor. { {"knl"}, CK_KNL, FEATURE_AVX512F, FeaturesKNL }, // Knights Mill processor. |