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| author | Kazushi (Jam) Marukawa <marukawa@nec.com> | 2020-06-08 11:41:41 +0200 |
|---|---|---|
| committer | Simon Moll <simon.moll@emea.nec.com> | 2020-06-08 11:41:57 +0200 |
| commit | c95ba11a3d87f1c16e92147c28a779796cf1af99 (patch) | |
| tree | a780c9f54dd9ad1b8e0a7b4ecde670f4e8d25b44 /llvm/lib/Support/VersionTuple.cpp | |
| parent | ae09670ee4de461669fc9f09b146ba0a5f0935fb (diff) | |
| download | llvm-c95ba11a3d87f1c16e92147c28a779796cf1af99.zip llvm-c95ba11a3d87f1c16e92147c28a779796cf1af99.tar.gz llvm-c95ba11a3d87f1c16e92147c28a779796cf1af99.tar.bz2 | |
[VE] Support control instructions in MC layer
Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
control instructions. Add not defined LPM/SPM/LFR/SFR/SMIR/NOP/LCR/
SCR/TSCR/FIDCR control isntructions newly. Define MISC registers which
SMIR instruction reads and IC register which SIC instruction reads.
Change asmparser to support Zero, UImm3, and UImm6 operands and MISC
registers. Change instprinter to support MISC registers also.
Change to use auto to receive dyn_cast also.
Differential Revision: https://reviews.llvm.org/D81370
Diffstat (limited to 'llvm/lib/Support/VersionTuple.cpp')
0 files changed, 0 insertions, 0 deletions