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| author | Thomas Lively <tlively@google.com> | 2020-03-11 18:08:46 -0700 |
|---|---|---|
| committer | Thomas Lively <tlively@google.com> | 2020-03-12 12:20:14 -0700 |
| commit | 4e589e6c26e3773541deefb94a149fec2f013318 (patch) | |
| tree | bd3a8a4298ba315970df65f7b4c4b7d77cd6a405 /llvm/lib/Support/Unicode.cpp | |
| parent | fe74df01a909fb02528e83e90124f1b706176ddd (diff) | |
| download | llvm-4e589e6c26e3773541deefb94a149fec2f013318.zip llvm-4e589e6c26e3773541deefb94a149fec2f013318.tar.gz llvm-4e589e6c26e3773541deefb94a149fec2f013318.tar.bz2 | |
[WebAssembly] Fix SIMD shift unrolling to avoid assertion failure
Summary:
Using the default DAG.UnrollVectorOp on v16i8 and v8i16 vectors
results in i8 or i16 nodes being inserted into the SelectionDAG. Since
those are illegal types, this causes a legalization assertion failure
for some code patterns, as uncovered by PR45178. This change unrolls
shifts manually to avoid this issue by adding and using a new optional
EVT argument to DAG.ExtractVectorElements to control the type of the
extract_element nodes.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, zzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76043
Diffstat (limited to 'llvm/lib/Support/Unicode.cpp')
0 files changed, 0 insertions, 0 deletions