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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-06-04 16:45:33 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-06-04 16:45:33 +0000 |
commit | fd2eda4f64fa9ba788c1628ebe59bf1504e77b9e (patch) | |
tree | b3aa416530d54518bd9431a86e77cd7d70631457 /llvm/lib/Support/Threading.cpp | |
parent | 4d302448ae5daf006cc38334b2e20ccda0d86415 (diff) | |
download | llvm-fd2eda4f64fa9ba788c1628ebe59bf1504e77b9e.zip llvm-fd2eda4f64fa9ba788c1628ebe59bf1504e77b9e.tar.gz llvm-fd2eda4f64fa9ba788c1628ebe59bf1504e77b9e.tar.bz2 |
[X86][AVX2] Fix v16i16 SHL lowering (PR27730)
The AVX2 v16i16 shift lowering works by unpacking to 2 x v8i32, performing the shift and then truncating the result.
The unpacking is used to place the values in the upper 16-bits so that we can correctly sign-extend for SRA shifts. Unfortunately we weren't ensuring that the lower 16-bits were zero to ensure that SHL correctly shifts in zero bits.
llvm-svn: 271796
Diffstat (limited to 'llvm/lib/Support/Threading.cpp')
0 files changed, 0 insertions, 0 deletions