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author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-06-02 18:29:15 +0000 |
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committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-06-02 18:29:15 +0000 |
commit | 63f78b020636d8a486f24564bc2255656f9c71f7 (patch) | |
tree | 46f2042bfc4ca77f42de5f36efa955c64ee7ae32 /llvm/lib/Support/Threading.cpp | |
parent | dd1463823a0c79bb7a1382839bdedb28c5541b41 (diff) | |
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[X86] Define segment MI operands as regs instead of i8imm.
We've been pretending that segments are i8imm since the initial
support (r68645), predating the addition of the SEGMENT_REG class
(r81895). That happens to works, but is wrong, and inconsistent
with how we print (e.g., X86ATTInstPrinter::printMemReference)
and parse them (e.g., X86Operand::addMemOperands).
This change shouldn't affect any tool users, but is visible to
library users or out-of-tree tablegen backends: this causes
MCOperandInfo for the segment op to have an RC instead of "unknown",
and TII::getRegClass to actually return something. As the registers
are reserved and no vregs of the class ever created, that shouldn't
change anything.
No test change; no suspicious getRegClass() in X86 and CodeGen.
llvm-svn: 271559
Diffstat (limited to 'llvm/lib/Support/Threading.cpp')
0 files changed, 0 insertions, 0 deletions