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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-02-14 11:54:55 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-02-14 11:55:18 +0000 |
| commit | 2492075add88af24bfc0c9af8a9af61b880c0ebb (patch) | |
| tree | 6867cb400c99b25ffd6e92ea72350cba01f684b3 /llvm/lib/Support/ThreadPool.cpp | |
| parent | de1c2877a9ff12899ef50e179ade748fba8ab0c0 (diff) | |
| download | llvm-2492075add88af24bfc0c9af8a9af61b880c0ebb.zip llvm-2492075add88af24bfc0c9af8a9af61b880c0ebb.tar.gz llvm-2492075add88af24bfc0c9af8a9af61b880c0ebb.tar.bz2 | |
[X86][SSE] lowerShuffleAsBitRotate - lower to vXi8 shuffles to ROTL on pre-SSSE3 targets
Without PSHUFB we are better using ROTL (expanding to OR(SHL,SRL)) than using the generic v16i8 shuffle lowering - but if we can widen to v8i16 or more then the existing shuffles are still the better option.
REAPPLIED: Original commit rG11c16e71598d was reverted at rGde1d90299b16 as it wasn't accounting for later lowering. This version emits ROTLI or the OR(VSHLI/VSRLI) directly to avoid the issue.
Diffstat (limited to 'llvm/lib/Support/ThreadPool.cpp')
0 files changed, 0 insertions, 0 deletions