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author | Jessica Paquette <jpaquette@apple.com> | 2020-12-04 15:51:44 -0800 |
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committer | Jessica Paquette <jpaquette@apple.com> | 2020-12-07 15:04:33 -0800 |
commit | 195a7af0abb26915f962462f69c0f17e3835f78b (patch) | |
tree | a084685b526a07daa8af09c1278a94b48d3ff761 /llvm/lib/Support/TargetParser.cpp | |
parent | 2656885390f17cceae142b4265c337fcee2410c0 (diff) | |
download | llvm-195a7af0abb26915f962462f69c0f17e3835f78b.zip llvm-195a7af0abb26915f962462f69c0f17e3835f78b.tar.gz llvm-195a7af0abb26915f962462f69c0f17e3835f78b.tar.bz2 |
[AArch64][GlobalISel] Narrow 128-bit regs to 64-bit regs in emitTestBit
When we have a 128-bit register, emitTestBit would incorrectly narrow to 32
bits always. If the bit number was > 32, then we would need a TB(N)ZX. This
would cause a crash, as we'd have the wrong register class. (PR48379)
This generalizes `narrowExtReg` into `moveScalarRegClass`.
This also allows us to remove `widenGPRBankRegIfNeeded` entirely, since
`selectCopy` correctly handles SUBREG_TO_REG etc.
This does create some codegen changes (since `selectCopy` uses the `all`
regclass variants). However, I think that these will likely be optimized away,
and we can always improve the `selectCopy` code. It looks like we should
revisit `selectCopy` at this point, and possibly refactor it into at least one
`emit` function.
Differential Revision: https://reviews.llvm.org/D92707
Diffstat (limited to 'llvm/lib/Support/TargetParser.cpp')
0 files changed, 0 insertions, 0 deletions