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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2018-10-22 11:22:59 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2018-10-22 11:22:59 +0000 |
| commit | 674581afbbd180745474adf0dcfebfd97e62dde7 (patch) | |
| tree | 84bb4ac8d13b1fa3f622cb9e3379cf076cf6af5a /llvm/lib/Support/SourceMgr.cpp | |
| parent | 3e778165d621ade86640ecc247156e07d9d3127b (diff) | |
| download | llvm-674581afbbd180745474adf0dcfebfd97e62dde7.zip llvm-674581afbbd180745474adf0dcfebfd97e62dde7.tar.gz llvm-674581afbbd180745474adf0dcfebfd97e62dde7.tar.bz2 | |
[PowerPC][NFC] Fix bugs in r+r to r+i conversion
The D-Form VSX loads introduced in ISA 3.0 are not direct D-Form equivalent of
the corresponding X-Forms since they only target the Altivec registers.
Namely LXSSPX can load into any of the 64 VSX registers whereas LXSSP can only
load into the upper 32 VSX registers. Similarly with the remaining affected
instructions.
There is currently no way that I can see to trigger the bug, but as we add other
ways of exploiting these instructions, there may very well be instances that do.
This is an NFC patch in practical terms since the changes it introduces can not
be triggered without an MIR test.
Differential revision: https://reviews.llvm.org/D53323
llvm-svn: 344894
Diffstat (limited to 'llvm/lib/Support/SourceMgr.cpp')
0 files changed, 0 insertions, 0 deletions