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| author | Craig Topper <craig.topper@sifive.com> | 2021-01-19 10:58:49 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2021-01-19 11:21:48 -0800 |
| commit | ce8b3937ddad39536e6e715813682d9198229fb5 (patch) | |
| tree | 95761f552fc81d22e22e3202d598afdb57dec566 /llvm/lib/Support/Signposts.cpp | |
| parent | 82e537a9d28a2c18bd1637e2eac0e0af658ed829 (diff) | |
| download | llvm-ce8b3937ddad39536e6e715813682d9198229fb5.zip llvm-ce8b3937ddad39536e6e715813682d9198229fb5.tar.gz llvm-ce8b3937ddad39536e6e715813682d9198229fb5.tar.bz2 | |
[RISCV] Add DAG combine to turn (setcc X, 1, setne) -> (setcc X, 0, seteq) if we can prove X is 0/1.
If we are able to compare with 0 instead of 1, we might be able
to fold the setcc into a beqz/bnez.
Often these setccs start life as an xor that gets converted to
a setcc by DAG combiner's rebuildSetcc. I looked into a detecting
(xor X, 1) and converting to (seteq X, 0) based on boolean contents
being 0/1 in rebuildSetcc instead of using computeKnownBits. It was
very perturbing to AMDGPU tests which I didn't look closely at.
It had a few changes on a couple other targets, but didn't seem
to be much if any improvement.
Reviewed By: lenary
Differential Revision: https://reviews.llvm.org/D94730
Diffstat (limited to 'llvm/lib/Support/Signposts.cpp')
0 files changed, 0 insertions, 0 deletions