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authorDavid Sherwood <david.sherwood@arm.com>2022-03-09 14:39:12 +0000
committerDavid Sherwood <david.sherwood@arm.com>2022-03-11 09:57:58 +0000
commitaeeb1199b4b4d33b823bae15ca969527c89676cf (patch)
tree75bc93f66d02be24be2fc3f22dfa1ee915968838 /llvm/lib/Support/MemoryBuffer.cpp
parent02c21060029cff4fdfd9eab3011a1fec6de2f9a0 (diff)
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[AArch64][SVE] Change the asserts in LowerToPredicatedOp to check for legal types
When building the LLVM test suite with SVE I discovered a crash when compiling some Halide tests, which occurs because we try to use SVE to lower 64-bit vector multiplies and there is no vscale_range attribute on the function. In this case the min SVE vector bits was 0, which caused an assert in LowerToPredicatedOp to fire. I have amended the asserts in this function to check that the fixed-width type is legal. If the fixed-width type is larger than NEON and is legal then it must be because we've set the min SVE vector bits to something > 128. Or if the min SVE bits is 0, then the only legal types allowed are 128 bit types - for any other types the assert will fire. Tests added here: CodeGen/AArch64/sve-fixed-length-no-vscale-range.ll Differential Revision: https://reviews.llvm.org/D121297
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