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authorFreddy Ye <freddy.ye@intel.com>2021-08-02 08:56:36 +0800
committerFreddy Ye <freddy.ye@intel.com>2021-08-02 11:01:01 +0800
commitd268c200701777085ef5d19e4a0637b87c7a02ac (patch)
treee46b3ddb6baa84e532bd3cdd1879dae7700f2ccc /llvm/lib/Support/Host.cpp
parent97c6ef4ea678ef9a69e1feaf9d77a0880bca09ba (diff)
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[X86] Support auto-detect for tigerlake and alderlake
Differential Revision: https://reviews.llvm.org/D107245
Diffstat (limited to 'llvm/lib/Support/Host.cpp')
-rw-r--r--llvm/lib/Support/Host.cpp16
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index f873ff0..5137c27 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -772,6 +772,22 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
*Subtype = X86::INTEL_COREI7_ICELAKE_CLIENT;
break;
+ // Tigerlake:
+ case 0x8c:
+ case 0x8d:
+ CPU = "tigerlake";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_TIGERLAKE;
+ break;
+
+ // Alderlake:
+ case 0x97:
+ case 0x9a:
+ CPU = "alderlake";
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_ALDERLAKE;
+ break;
+
// Icelake Xeon:
case 0x6a:
case 0x6c: