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| author | Victor Huang <wei.huang@ibm.com> | 2020-01-23 14:01:02 -0600 |
|---|---|---|
| committer | Victor Huang <wei.huang@ibm.com> | 2020-01-24 07:27:25 -0600 |
| commit | 5cee34013cfd4edea0041bc0b73121cc4ad76ccf (patch) | |
| tree | 6512b657b92f21fbaecbf0c914cd274422343232 /llvm/lib/Support/FileCheck.cpp | |
| parent | 06ae3748db8a23568f2f238a9534ea9052725ea3 (diff) | |
| download | llvm-5cee34013cfd4edea0041bc0b73121cc4ad76ccf.zip llvm-5cee34013cfd4edea0041bc0b73121cc4ad76ccf.tar.gz llvm-5cee34013cfd4edea0041bc0b73121cc4ad76ccf.tar.bz2 | |
[PowerPC][Future] Add prefixed instruction paddi to future CPU
Future CPU will include support for prefixed instructions.
These prefixed instructions are formed by a 4 byte prefix
immediately followed by a 4 byte instruction effectively
making an 8 byte instruction. The new instruction paddi
is a prefixed form of addi.
This patch adds paddi and all of the support required
for that instruction. The majority of the patch deals with
supporting the new prefixed instructions. The addition of
paddi is mainly to allow for testing.
Differential Revision: https://reviews.llvm.org/D72569
Diffstat (limited to 'llvm/lib/Support/FileCheck.cpp')
0 files changed, 0 insertions, 0 deletions