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| author | Craig Topper <craig.topper@intel.com> | 2020-08-08 14:05:51 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2020-08-08 14:19:13 -0700 |
| commit | d3153b5ca29b80d73af449727ca557eb6ccbd973 (patch) | |
| tree | 5617213f37e237d6fb0f0b7be5ddee4f02340db6 /llvm/lib/Support/Compression.cpp | |
| parent | d4c3f20285aded64e31a4faf6a5a9280352ff6af (diff) | |
| download | llvm-d3153b5ca29b80d73af449727ca557eb6ccbd973.zip llvm-d3153b5ca29b80d73af449727ca557eb6ccbd973.tar.gz llvm-d3153b5ca29b80d73af449727ca557eb6ccbd973.tar.bz2 | |
[X86] Remove a DCI.isBeforeLegalize() call from combineVSelectWithAllOnesOrZeros.
This was blocking isTypeLegal call so that we could do a particular
transform on illegal types before type legalization. But the we
create a target specific node using that type. We shouldn't do
that if the type isn't legal. So I think we should just always
make sure the type is legal.
I suspect that in order to get the condition VT to not be a vector
of i1 we already completed type legalization anyway so this probably
doesn't matter much in practice.
Diffstat (limited to 'llvm/lib/Support/Compression.cpp')
0 files changed, 0 insertions, 0 deletions