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| author | Carl Ritson <carl.ritson@amd.com> | 2021-07-16 12:13:29 +0900 |
|---|---|---|
| committer | Carl Ritson <carl.ritson@amd.com> | 2021-07-16 13:02:24 +0900 |
| commit | f5917e0312edacf1fe4cfebc532e3a78c854adee (patch) | |
| tree | 24e5514f639306bd2f952663b958cced3e4cf302 /llvm/lib/Support/CommandLine.cpp | |
| parent | d695d0d6f60528841ab8671cdccff85f889ca95d (diff) | |
| download | llvm-f5917e0312edacf1fe4cfebc532e3a78c854adee.zip llvm-f5917e0312edacf1fe4cfebc532e3a78c854adee.tar.gz llvm-f5917e0312edacf1fe4cfebc532e3a78c854adee.tar.bz2 | |
[TableGen] Allow isAllocatable inheritence from any superclass
When setting Allocatable on a generated register class check all
superclasses and set Allocatable true if any superclass is
allocatable.
Without this change generated register classes based on an
allocatable class may end up unallocatable due to the topological
inheritance order.
This change primarily effects AMDGPU backend; however, there are
a few changes in MIPs GlobalISel register constraints as a result.
Reviewed By: kparzysz
Differential Revision: https://reviews.llvm.org/D105967
Diffstat (limited to 'llvm/lib/Support/CommandLine.cpp')
0 files changed, 0 insertions, 0 deletions