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| author | zhongyunde <zhongyunde@huawei.com> | 2022-09-09 09:00:20 +0800 |
|---|---|---|
| committer | zhongyunde <zhongyunde@huawei.com> | 2022-09-09 09:00:54 +0800 |
| commit | b6655333c25556d2d9e3a9d73f488d525176d71c (patch) | |
| tree | 383c6df181c4f52d4803dd0b6cd9b5e4c18e8aa2 /llvm/lib/Support/CommandLine.cpp | |
| parent | 180bf5f9403d42586aedb374d63c72e75a7b7ce3 (diff) | |
| download | llvm-b6655333c25556d2d9e3a9d73f488d525176d71c.zip llvm-b6655333c25556d2d9e3a9d73f488d525176d71c.tar.gz llvm-b6655333c25556d2d9e3a9d73f488d525176d71c.tar.bz2 | |
[Peephole] rewrite INSERT_SUBREG to SUBREG_TO_REG if upper bits zero
Restrict the 32-bit form of an instruction of integer as too many test cases
will be clobber as the register number updated.
From %reg = INSERT_SUBREG %reg, %subreg, subidx
To %reg:subidx = SUBREG_TO_REG 0, %subreg, subidx
Try to prefix the redundant mov instruction at D132325 as the SUBREG_TO_REG should not generate code.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D132939
Diffstat (limited to 'llvm/lib/Support/CommandLine.cpp')
0 files changed, 0 insertions, 0 deletions