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authorSimon Pilgrim <llvm-dev@redking.me.uk>2022-05-14 09:49:55 +0100
committerSimon Pilgrim <llvm-dev@redking.me.uk>2022-05-14 09:50:01 +0100
commit1ecc3d86ae3eeb43336c27c4d653e06236b918a2 (patch)
tree0552d3c01f746e306211ca9826a2c56bfe34214f /llvm/lib/Support/APInt.cpp
parentae8bbc43f4709b910cd6c1e1ddc5bc854785a142 (diff)
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[DAG] Enable ISD::SHL SimplifyMultipleUseDemandedBits handling inside SimplifyDemandedBits
Pulled out of D77804 as its going to be easier to address the regressions individually. This patch allows SimplifyDemandedBits to call SimplifyMultipleUseDemandedBits in cases where the source operand has other uses, enabling us to peek through the shifted value if we don't demand all the bits/elts. The lost RISCV gorc2 fold shouldn't be a problem - instcombine would have already destroyed that pattern - see https://github.com/llvm/llvm-project/issues/50553 Differential Revision: https://reviews.llvm.org/D124839
Diffstat (limited to 'llvm/lib/Support/APInt.cpp')
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