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authorSimon Pilgrim <llvm-dev@redking.me.uk>2023-09-06 13:19:32 +0100
committerSimon Pilgrim <llvm-dev@redking.me.uk>2023-09-06 13:19:42 +0100
commite4d0e1209934ee8885fb4c3f046f9aa29c660d55 (patch)
treec9bc88d7e10e400509a58f79ab8f1c516d9e8f36 /llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp
parent05eaff18c401a6d946be0ab77b80415b78e76869 (diff)
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[DAG] Fold (shl (sext (add_nsw x, c1)), c2) -> (add (shl (sext x), c2), c1 << c2) (REAPPLIED)
Assuming the ADD is nsw then it may be sign-extended to merge with a SHL op in a similar fold to the existing (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2) fold. This is most useful for helping to expose address math for X86, but has also touched several aarch64 test cases as well. Alive2: https://alive2.llvm.org/ce/z/2UpSbJ Differential Revision: https://reviews.llvm.org/D159198
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