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author | Luo, Yuanke <yuanke.luo@intel.com> | 2022-06-25 22:00:44 +0800 |
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committer | Luo, Yuanke <yuanke.luo@intel.com> | 2022-06-29 10:35:43 +0800 |
commit | 5cb09798700aecff1f9f61b7cd80852c61e10fa8 (patch) | |
tree | 568a4de053a9713d21f7e230fba582a3f583f124 /llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp | |
parent | fc2d96c334a15d00965eb57a99d49e46728641db (diff) | |
download | llvm-5cb09798700aecff1f9f61b7cd80852c61e10fa8.zip llvm-5cb09798700aecff1f9f61b7cd80852c61e10fa8.tar.gz llvm-5cb09798700aecff1f9f61b7cd80852c61e10fa8.tar.bz2 |
[X86][AMX] Split greedy RA for tile register
When we fill the shape to tile configure memory, the shape is gotten
from AMX pseudo instruction. However the register for the shape may be
split or spilled by greedy RA. That cause we fill the shape to config
memory after ldtilecfg is executed, so that the shape configuration
would be wrong.
This patch is to split the tile register allocation from greedy register
allocation, so that after tile registers are allocated the shape
registers are still virtual register. The shape register only may be
redefined or multi-defined by phi elimination pass, two address pass.
That doesn't affect tile register configuration.
Differential Revision: https://reviews.llvm.org/D128584
Diffstat (limited to 'llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp')
0 files changed, 0 insertions, 0 deletions