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| author | Erich Keane <erich.keane@intel.com> | 2017-06-21 16:37:22 +0000 |
|---|---|---|
| committer | Erich Keane <erich.keane@intel.com> | 2017-06-21 16:37:22 +0000 |
| commit | 4bd39300efee1328ab48c5494b325b69eaeba207 (patch) | |
| tree | a71120f178b21ebebc46287eaf2606336c1ba114 /llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp | |
| parent | 5b173f2bb3b5a0fb6f2c6c51ce86227a849e61b8 (diff) | |
| download | llvm-4bd39300efee1328ab48c5494b325b69eaeba207.zip llvm-4bd39300efee1328ab48c5494b325b69eaeba207.tar.gz llvm-4bd39300efee1328ab48c5494b325b69eaeba207.tar.bz2 | |
Correct VectorCall x86 (32 bit) behavior for SSE Register Assignment
In running some internal vectorcall tests in 32 bit mode, we discovered that the
behavior I'd previously implemented for x64 (and applied to x32) regarding the
assignment of SSE registers was incorrect. See spec here:
https://msdn.microsoft.com/en-us/library/dn375768.aspx
My previous implementation applied register argument position from the x64
version to both. This isn't correct for x86, so this removes and refactors that
section. Additionally, it corrects the integer/int-pointer assignments. Unlike
x64, x86 permits integers to be assigned independent of position.
Finally, the code for 32 bit was cleaned up a little to clarify the intent,
as well as given a descriptive comment.
Differential Revision: https://reviews.llvm.org/D34455
llvm-svn: 305928
Diffstat (limited to 'llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp')
0 files changed, 0 insertions, 0 deletions