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authorhev <wangrui@loongson.cn>2023-10-11 10:24:18 +0800
committerGitHub <noreply@github.com>2023-10-11 10:24:18 +0800
commit203ba238e33c570dba6cbcf247f1668bb2a13c26 (patch)
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parenta157e79dd207d72aea1d42953c61f14790d847c1 (diff)
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[LoongArch] Improve codegen for atomic ops (#67391)
This PR improves memory barriers generated by atomic operations. Memory barrier semantics of LL/SC: ``` LL: <memory-barrier> + <load-exclusive> SC: <store-conditional> + <memory-barrier> ``` Changes: * Remove unnecessary memory barriers before LL and between LL/SC. * Fix acquire semantics. (If the SC instruction is not executed, then the guarantee of acquiring semantics cannot be ensured. Therefore, an acquire barrier needs to be generated when memory ordering includes an acquire operation.)
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