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| author | Albion Fung <albion.fung@ibm.com> | 2021-03-09 16:07:31 -0500 |
|---|---|---|
| committer | Albion Fung <conanap@lep82435v.canlab.ibm.com> | 2021-03-09 16:08:17 -0500 |
| commit | 9b6ac9e999e730ee3a9f0bf4850f7794274de3f0 (patch) | |
| tree | 71af007db61e2dfeaf1bb3a3230a1771712737b5 /llvm/lib/ProfileData/Coverage/CoverageMapping.cpp | |
| parent | f49354838e526671e616d16199ebdee653b9f6fa (diff) | |
| download | llvm-9b6ac9e999e730ee3a9f0bf4850f7794274de3f0.zip llvm-9b6ac9e999e730ee3a9f0bf4850f7794274de3f0.tar.gz llvm-9b6ac9e999e730ee3a9f0bf4850f7794274de3f0.tar.bz2 | |
[P10] [Power PC] Exploiting new load rightmost vector element instructions.
This pull request implements patterns to exploit the load rightmost vector
element instructions for loading element 0 on little endian PowerPC subtargets
into v8i16 and v16i8 vector registers for i16 and i8 data types.
Differential Revision: https://reviews.llvm.org/D94816#inline-921403
Diffstat (limited to 'llvm/lib/ProfileData/Coverage/CoverageMapping.cpp')
0 files changed, 0 insertions, 0 deletions