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| author | Simon Dardis <simon.dardis@imgtec.com> | 2016-04-29 16:04:18 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2016-04-29 16:04:18 +0000 |
| commit | 7383bfd8bdddeb182089b73f0832767399eb8bf7 (patch) | |
| tree | 3a88495ffd1fa10750a3b04401f3b83e11c52f5c /llvm/lib/ProfileData/Coverage/CoverageMapping.cpp | |
| parent | f5cbac93eb02306c1d3d9c7a472c1c13f3c6793b (diff) | |
| download | llvm-7383bfd8bdddeb182089b73f0832767399eb8bf7.zip llvm-7383bfd8bdddeb182089b73f0832767399eb8bf7.tar.gz llvm-7383bfd8bdddeb182089b73f0832767399eb8bf7.tar.bz2 | |
[PATCH] [mips] Fix forbidden slot hazard handling
MipsHazardSchedule has to determine what the next physical machine instruction
is to decide whether to insert a nop. In case where a branch with a forbidden
slot appears at the end of a basic block, first *real* instruction of the next
physical basic block was determined using getFirstNonDebugInstr().
Unfortunately this only considers DBG_VALUEs and not other transient opcodes
such as EHLABEL. As EHLABEL passes the SafeInForbiddenSlot predicate and the
instruction after the EHLABEL can be a CTI, we observed test failures in the
LNT testsuite.
Reviewers: dsanders
Differential Review: http://reviews.llvm.org/D19051
llvm-svn: 268052
Diffstat (limited to 'llvm/lib/ProfileData/Coverage/CoverageMapping.cpp')
0 files changed, 0 insertions, 0 deletions