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authorLuqman Aden <me@luqman.ca>2020-10-19 22:10:27 -0700
committerLuqman Aden <me@luqman.ca>2020-10-19 22:16:16 -0700
commit51892a42dac55558f7dbec80ced570e72ff387c4 (patch)
tree6ff6df331c3c0338f1bd33022423a9f8dc296489 /llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
parent7e9411efcf09e31d2db9e82dde378e40c908fc82 (diff)
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[COFF][ARM] Fix CodeView for Windows on 32bit ARM targets.
Create the LLVM / CodeView register mappings for the 32-bit ARM Window targets. Reviewed By: compnerd Differential Revision: https://reviews.llvm.org/D89622
Diffstat (limited to 'llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp')
-rw-r--r--llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp25
1 files changed, 24 insertions, 1 deletions
diff --git a/llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp b/llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
index 95409fd..6b6a117 100644
--- a/llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
+++ b/llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
@@ -147,7 +147,30 @@ void ScalarEnumerationTraits<CPUType>::enumeration(IO &io, CPUType &Cpu) {
}
void ScalarEnumerationTraits<RegisterId>::enumeration(IO &io, RegisterId &Reg) {
- auto RegNames = getRegisterNames(CPUType::X64);
+ const auto *Header = static_cast<COFF::header *>(io.getContext());
+ assert(Header && "The IO context is not initialized");
+
+ Optional<CPUType> CpuType;
+ ArrayRef<EnumEntry<uint16_t>> RegNames;
+
+ switch (Header->Machine) {
+ case COFF::IMAGE_FILE_MACHINE_I386:
+ CpuType = CPUType::Pentium3;
+ break;
+ case COFF::IMAGE_FILE_MACHINE_AMD64:
+ CpuType = CPUType::X64;
+ break;
+ case COFF::IMAGE_FILE_MACHINE_ARMNT:
+ CpuType = CPUType::ARMNT;
+ break;
+ case COFF::IMAGE_FILE_MACHINE_ARM64:
+ CpuType = CPUType::ARM64;
+ break;
+ }
+
+ if (CpuType)
+ RegNames = getRegisterNames(*CpuType);
+
for (const auto &E : RegNames) {
io.enumCase(Reg, E.Name.str().c_str(), static_cast<RegisterId>(E.Value));
}