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authorSanjay Patel <spatel@rotateright.com>2019-12-31 12:29:53 -0500
committerSanjay Patel <spatel@rotateright.com>2019-12-31 12:35:10 -0500
commita041c4ec6f7aa659b235cb67e9231a05e0a33b7d (patch)
tree6f0dc6e6ce4544e3a8b2135d2ba3e1df1271c7e1 /llvm/lib/ObjectYAML/CodeViewYAMLDebugSections.cpp
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[InstCombine] fold zext of masked bit set/clear
This does not solve PR17101, but it is one of the underlying diffs noted here: https://bugs.llvm.org/show_bug.cgi?id=17101#c8 We could ease the one-use checks for the 'clear' (no 'not' op) half of the transform, but I do not know if that asymmetry would make things better or worse. Proofs: https://rise4fun.com/Alive/uVB Name: masked bit set %sh1 = shl i32 1, %y %and = and i32 %sh1, %x %cmp = icmp ne i32 %and, 0 %r = zext i1 %cmp to i32 => %s = lshr i32 %x, %y %r = and i32 %s, 1 Name: masked bit clear %sh1 = shl i32 1, %y %and = and i32 %sh1, %x %cmp = icmp eq i32 %and, 0 %r = zext i1 %cmp to i32 => %xn = xor i32 %x, -1 %s = lshr i32 %xn, %y %r = and i32 %s, 1
Diffstat (limited to 'llvm/lib/ObjectYAML/CodeViewYAMLDebugSections.cpp')
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