diff options
| author | Craig Topper <craig.topper@sifive.com> | 2024-05-28 15:05:23 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-05-28 15:05:23 -0700 |
| commit | 2d00c6fe06b6d709b4ab3d6b253df304c04e0c1f (patch) | |
| tree | 63a241e6020a7576dd2c3a4e02820ab76ae795bd /llvm/lib/Object/WasmObjectFile.cpp | |
| parent | 00bd2fa1982f3114536323209fffad909463effc (diff) | |
| download | llvm-2d00c6fe06b6d709b4ab3d6b253df304c04e0c1f.zip llvm-2d00c6fe06b6d709b4ab3d6b253df304c04e0c1f.tar.gz llvm-2d00c6fe06b6d709b4ab3d6b253df304c04e0c1f.tar.bz2 | |
[RISCV] Add a rematerializable pseudo instruction for LUI+ADDI for global addresses. (#93352)
This allows register allocation to rematerialize these instead of
spilling and reloading. We need to make it a single instruction due to
limitations in rematerialization.
This pseudo is expanded to an LUI+ADDI pair between regalloc and post RA
scheduling.
This improves the dynamic instruction count on 531.deepsjeng_r from
spec2017 by 3.2% for the train dataset. 500.perlbench and 502.gcc see a
1% improvement. There are couple regressions, but they are 0.1% or
smaller.
AArch64 has similar pseudo instructions like MOVaddr
Diffstat (limited to 'llvm/lib/Object/WasmObjectFile.cpp')
0 files changed, 0 insertions, 0 deletions