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author | Paul Walker <paul.walker@arm.com> | 2022-02-09 17:12:54 +0000 |
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committer | Paul Walker <paul.walker@arm.com> | 2022-02-10 17:22:01 +0000 |
commit | 02e0d50eb1e42eec9b236d9ce45f507ac69d9327 (patch) | |
tree | ffcf3811de83f49c6e75c9260a40591661aca877 /llvm/lib/Object/TapiFile.cpp | |
parent | 039a88be56b443156a626a0fe75c742216394b3a (diff) | |
download | llvm-02e0d50eb1e42eec9b236d9ce45f507ac69d9327.zip llvm-02e0d50eb1e42eec9b236d9ce45f507ac69d9327.tar.gz llvm-02e0d50eb1e42eec9b236d9ce45f507ac69d9327.tar.bz2 |
[SVE] Remove AArch64ISD::ADD_PRED and AArch64ISD::SUB_PRED.
These nodes provide an indirection that is not necessary because
SVE has unpredicated add/sub instructions and there's no downside
to using them for partial register operations. In fact, the test
changes show that unifying how fixed-length and scalable vector
add/sub are lowered enables better use of existing isel patterns.
Differential Revision: https://reviews.llvm.org/D119355
Diffstat (limited to 'llvm/lib/Object/TapiFile.cpp')
0 files changed, 0 insertions, 0 deletions