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| author | Sudharsan Veeravalli <quic_svs@quicinc.com> | 2024-11-29 10:26:00 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-29 10:26:00 +0530 |
| commit | 8fcbba82d6c8038c4a0c5859275523414107b198 (patch) | |
| tree | 5ece81426967825d52fa5a563df19599bba4afee /llvm/lib/Object/MachOObjectFile.cpp | |
| parent | d83148f9b9debde1358f0686594da208ce33182e (diff) | |
| download | llvm-8fcbba82d6c8038c4a0c5859275523414107b198.zip llvm-8fcbba82d6c8038c4a0c5859275523414107b198.tar.gz llvm-8fcbba82d6c8038c4a0c5859275523414107b198.tar.bz2 | |
[RISCV] Add Qualcomm uC Xqcisls (Scaled Load Store) extension (#117987)
This extension adds 8 load/store instructions with a scaled index
addressing mode.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/latest
This patch adds assembler only support.
Diffstat (limited to 'llvm/lib/Object/MachOObjectFile.cpp')
0 files changed, 0 insertions, 0 deletions