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| author | JF Bastien <jfb@google.com> | 2015-03-04 15:47:57 +0000 |
|---|---|---|
| committer | JF Bastien <jfb@google.com> | 2015-03-04 15:47:57 +0000 |
| commit | f14889ee3474354e81bf58fe1c4f87739f1f22b5 (patch) | |
| tree | d866d4f8bd26a85e6589287f2ff296e9833ac464 /llvm/lib/Object/IRObjectFile.cpp | |
| parent | c925808ee50a3b57f0ab96da0642adcee1685aba (diff) | |
| download | llvm-f14889ee3474354e81bf58fe1c4f87739f1f22b5.zip llvm-f14889ee3474354e81bf58fe1c4f87739f1f22b5.tar.gz llvm-f14889ee3474354e81bf58fe1c4f87739f1f22b5.tar.bz2 | |
Mutate TargetLowering::shouldExpandAtomicRMWInIR to specifically dictate how AtomicRMWInsts are expanded.
Summary:
In PNaCl, most atomic instructions have their own @llvm.nacl.atomic.* function, each one, with a few exceptions, represents a consistent behaviour across all NaCl-supported targets. Unfortunately, the atomic RMW operations nand, [u]min, and [u]max aren't directly represented by any such @llvm.nacl.atomic.* function. This patch refines shouldExpandAtomicRMWInIR in TargetLowering so that a future `Le32TargetLowering` class can selectively inform the caller how the target desires the atomic RMW instruction to be expanded (ie via load-linked/store-conditional for ARM/AArch64, via cmpxchg for X86/others?, or not at all for Mips) if at all.
This does not represent a behavioural change and as such no tests were added.
Patch by: Richard Diamond.
Reviewers: jfb
Reviewed By: jfb
Subscribers: jfb, aemerson, t.p.northover, llvm-commits
Differential Revision: http://reviews.llvm.org/D7713
llvm-svn: 231250
Diffstat (limited to 'llvm/lib/Object/IRObjectFile.cpp')
0 files changed, 0 insertions, 0 deletions