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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-08 19:03:20 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-08 19:03:20 +0000 |
| commit | 3c7581bbebbb339a850e18733874a665e1def2d8 (patch) | |
| tree | 3e4bc93e3f73e5bdfa28bfd20db266c7cc78e3e2 /llvm/lib/Object/IRObjectFile.cpp | |
| parent | 6a38cc6d67da5568d5aa37abce66e2d13ccd75a7 (diff) | |
| download | llvm-3c7581bbebbb339a850e18733874a665e1def2d8.zip llvm-3c7581bbebbb339a850e18733874a665e1def2d8.tar.gz llvm-3c7581bbebbb339a850e18733874a665e1def2d8.tar.bz2 | |
AMDGPU: Use correct register names in inline assembly
Fixes using physical registers in inline asm from clang.
llvm-svn: 305004
Diffstat (limited to 'llvm/lib/Object/IRObjectFile.cpp')
0 files changed, 0 insertions, 0 deletions