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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-02 23:15:42 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-02 23:15:42 +0000 |
| commit | 0de924b76d13f6825850b0eb3ffc42342f1cfa36 (patch) | |
| tree | 583a56ce93407933b7790bac2a3d4d04f8b1af59 /llvm/lib/Object/FunctionIndexObjectFile.cpp | |
| parent | 7f4df5432ef7effd0ba6252de0672289e515e4fc (diff) | |
| download | llvm-0de924b76d13f6825850b0eb3ffc42342f1cfa36.zip llvm-0de924b76d13f6825850b0eb3ffc42342f1cfa36.tar.gz llvm-0de924b76d13f6825850b0eb3ffc42342f1cfa36.tar.bz2 | |
AMDGPU: Distribute SGPR->VGPR copies of REG_SEQUENCE
Make the REG_SEQUENCE be a VGPR, and do the register class
copy first.
llvm-svn: 251855
Diffstat (limited to 'llvm/lib/Object/FunctionIndexObjectFile.cpp')
0 files changed, 0 insertions, 0 deletions