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| author | Matthias Braun <matze@braunis.de> | 2017-01-18 00:59:19 +0000 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2017-01-18 00:59:19 +0000 |
| commit | de5fea2c30dc7ef2f8e0e30639064855260bfa0a (patch) | |
| tree | da3ce87c983233ff6707ef8a26a3b1ce2ec9023d /llvm/lib/Object/ELFObjectFile.cpp | |
| parent | 34c23279c202e3f403e36883f415257abdb52005 (diff) | |
| download | llvm-de5fea2c30dc7ef2f8e0e30639064855260bfa0a.zip llvm-de5fea2c30dc7ef2f8e0e30639064855260bfa0a.tar.gz llvm-de5fea2c30dc7ef2f8e0e30639064855260bfa0a.tar.bz2 | |
MIRParser: Allow regclass specification on operand
You can now define the register class of a virtual register on the
operand itself avoiding the need to use a "registers:" block.
Example: "%0:gr64 = COPY %rax"
Differential Revision: https://reviews.llvm.org/D22398
llvm-svn: 292321
Diffstat (limited to 'llvm/lib/Object/ELFObjectFile.cpp')
0 files changed, 0 insertions, 0 deletions