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| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2019-05-30 12:37:05 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2019-05-30 12:37:05 +0000 |
| commit | 7eb95d672dbf302a422ae4dbb24dd7cc583b65df (patch) | |
| tree | 9224450e0c07a654fb78cfdb755b83f592dfdcb9 /llvm/lib/Object/ELFObjectFile.cpp | |
| parent | ce127bb60ea1d570e50a6730b468ba537fd08751 (diff) | |
| download | llvm-7eb95d672dbf302a422ae4dbb24dd7cc583b65df.zip llvm-7eb95d672dbf302a422ae4dbb24dd7cc583b65df.tar.gz llvm-7eb95d672dbf302a422ae4dbb24dd7cc583b65df.tar.bz2 | |
[ARM] Introduce separate features for FP registers
The MVE extension in Arm v8.1-M permits the use of some move, load and
store isntructions which access the FP registers, even if there's no
actual FP support in the processor (in particular, if you have the
integer-only version of MVE).
Therefore, we need separate subtarget features to condition those
instructions on, which are implied by both FP and MVE but are not part
of either.
Patch mostly by Simon Tatham.
Differential Revision: https://reviews.llvm.org/D60694
llvm-svn: 362088
Diffstat (limited to 'llvm/lib/Object/ELFObjectFile.cpp')
0 files changed, 0 insertions, 0 deletions