[DAGCombiner] Fix (shl (ctlz x) n) for non-power-of-two Data

This DAGCombine is not valid for some combinations of the known bits
of x and non-power-of-two widths of x. As shown in the bug:
- The bitwidth of x is 35 (n=5)
- The unknown bits of x is only the least significant bit
- This gives the result of the ctlz two possible values: 34 or 35, both
  of which will give 1 when left-shifted 5 bits.
- So the `eor x, 1` that this optimisation would give is not correct.

A similar instcombine optimisation is only applied when the width of x is
a power-of-two. GlobalISel does not have this bug, as shown by the testcase.

Fixes #61549

Differential Revision: https://reviews.llvm.org/D147518

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