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authorSebastian Neubauer <Sebastian.Neubauer@amd.com>2022-01-07 18:27:45 +0100
committerSebastian Neubauer <Sebastian.Neubauer@amd.com>2022-01-13 11:55:13 +0100
commitf4139440f1cf2b30705d7f81104cc51eca3d4977 (patch)
tree3b20f108c7db41db6e2e51045f52867bc6360f60 /llvm/lib/Object/Binary.cpp
parentb65f21a4988dc4666d228f5f00891c25aa0e921b (diff)
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[Docs] Fix IR and TableGen grammar inconsistencies
IR: - globals (and functions, ifuncs, aliases) can have a partition - catchret has a `to` before the label - the sint/int types do not exist - signext comes after the type - a variable was missing its type TableGen: - The second value after a `#` concatenation is optional See e.g. llvm/lib/Target/X86/X86InstrAVX512.td:L3351 - IncludeDirective and PreprocessorDirective were never referenced in the grammar - Add some missing ; - Parent classes of multiclasses can have generic arguments. Reuse the `ParentClassList` that is already used in other places. MIR: - liveins only allows physical registers, which start with a $ Differential Revision: https://reviews.llvm.org/D116674
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