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author | Rafael Espindola <rafael.espindola@gmail.com> | 2015-01-12 18:13:07 +0000 |
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committer | Rafael Espindola <rafael.espindola@gmail.com> | 2015-01-12 18:13:07 +0000 |
commit | d9c3e308f5468a6eb791faf61a0068baced25fcc (patch) | |
tree | 9bdc2a708b49faf02a0e652116ccb33ff63aaabb /llvm/lib/MC/MachObjectWriter.cpp | |
parent | daa335a9c2d627f05bc2f74d32aefa7f7b32b1bb (diff) | |
download | llvm-d9c3e308f5468a6eb791faf61a0068baced25fcc.zip llvm-d9c3e308f5468a6eb791faf61a0068baced25fcc.tar.gz llvm-d9c3e308f5468a6eb791faf61a0068baced25fcc.tar.bz2 |
Add r224985 back with two fixes.
One is that AArch64 has additional restrictions on when local relocations can
be used. We have to take those into consideration when deciding to put a L
symbol in the symbol table or not.
The other is that ld64 requires the relocations to cstring to use linker
visible symbols on AArch64.
Thanks to Michael Zolotukhin for testing this!
Remove doesSectionRequireSymbols.
In an assembly expression like
bar:
.long L0 + 1
the intended semantics is that bar will contain a pointer one byte past L0.
In sections that are merged by content (strings, 4 byte constants, etc), a
single position in the section doesn't give the linker enough information.
For example, it would not be able to tell a relocation must point to the
end of a string, since that would look just like the start of the next.
The solution used in ELF to use relocation with symbols if there is a non-zero
addend.
In MachO before this patch we would just keep all symbols in some sections.
This would miss some cases (only cstrings on x86_64 were implemented) and was
inefficient since most relocations have an addend of 0 and can be represented
without the symbol.
This patch implements the non-zero addend logic for MachO too.
llvm-svn: 225644
Diffstat (limited to 'llvm/lib/MC/MachObjectWriter.cpp')
-rw-r--r-- | llvm/lib/MC/MachObjectWriter.cpp | 41 |
1 files changed, 27 insertions, 14 deletions
diff --git a/llvm/lib/MC/MachObjectWriter.cpp b/llvm/lib/MC/MachObjectWriter.cpp index d3751bd..588d424 100644 --- a/llvm/lib/MC/MachObjectWriter.cpp +++ b/llvm/lib/MC/MachObjectWriter.cpp @@ -448,14 +448,11 @@ void MachObjectWriter::WriteLinkerOptionsLoadCommand( assert(OS.tell() - Start == Size); } - -void MachObjectWriter::RecordRelocation(const MCAssembler &Asm, +void MachObjectWriter::RecordRelocation(MCAssembler &Asm, const MCAsmLayout &Layout, const MCFragment *Fragment, - const MCFixup &Fixup, - MCValue Target, - bool &IsPCRel, - uint64_t &FixedValue) { + const MCFixup &Fixup, MCValue Target, + bool &IsPCRel, uint64_t &FixedValue) { TargetObjectWriter->RecordRelocation(this, Asm, Layout, Fragment, Fixup, Target, FixedValue); } @@ -616,6 +613,22 @@ void MachObjectWriter::ComputeSymbolTable( ExternalSymbolData[i].SymbolData->setIndex(Index++); for (unsigned i = 0, e = UndefinedSymbolData.size(); i != e; ++i) UndefinedSymbolData[i].SymbolData->setIndex(Index++); + + for (const MCSectionData &SD : Asm) { + std::vector<RelAndSymbol> &Relocs = Relocations[&SD]; + for (RelAndSymbol &Rel : Relocs) { + if (!Rel.Sym) + continue; + + // Set the Index and the IsExtern bit. + unsigned Index = Rel.Sym->getIndex(); + assert(isInt<24>(Index)); + if (IsLittleEndian) + Rel.MRE.r_word1 = (Rel.MRE.r_word1 & (-1 << 24)) | Index | (1 << 27); + else + Rel.MRE.r_word1 = (Rel.MRE.r_word1 & 0xff) | Index << 8 | (1 << 4); + } + } } void MachObjectWriter::computeSectionAddresses(const MCAssembler &Asm, @@ -662,10 +675,6 @@ void MachObjectWriter::ExecutePostLayoutBinding(MCAssembler &Asm, // Mark symbol difference expressions in variables (from .set or = directives) // as absolute. markAbsoluteVariableSymbols(Asm, Layout); - - // Compute symbol table information and bind symbol indices. - ComputeSymbolTable(Asm, LocalSymbolData, ExternalSymbolData, - UndefinedSymbolData); } bool MachObjectWriter:: @@ -749,6 +758,10 @@ IsSymbolRefDifferenceFullyResolvedImpl(const MCAssembler &Asm, void MachObjectWriter::WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout) { + // Compute symbol table information and bind symbol indices. + ComputeSymbolTable(Asm, LocalSymbolData, ExternalSymbolData, + UndefinedSymbolData); + unsigned NumSections = Asm.size(); const MCAssembler::VersionMinInfoType &VersionInfo = Layout.getAssembler().getVersionMinInfo(); @@ -839,7 +852,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm, uint64_t RelocTableEnd = SectionDataStart + SectionDataFileSize; for (MCAssembler::const_iterator it = Asm.begin(), ie = Asm.end(); it != ie; ++it) { - std::vector<MachO::any_relocation_info> &Relocs = Relocations[it]; + std::vector<RelAndSymbol> &Relocs = Relocations[it]; unsigned NumRelocs = Relocs.size(); uint64_t SectionStart = SectionDataStart + getSectionAddress(it); WriteSection(Asm, Layout, *it, SectionStart, RelocTableEnd, NumRelocs); @@ -933,10 +946,10 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm, ie = Asm.end(); it != ie; ++it) { // Write the section relocation entries, in reverse order to match 'as' // (approximately, the exact algorithm is more complicated than this). - std::vector<MachO::any_relocation_info> &Relocs = Relocations[it]; + std::vector<RelAndSymbol> &Relocs = Relocations[it]; for (unsigned i = 0, e = Relocs.size(); i != e; ++i) { - Write32(Relocs[e - i - 1].r_word0); - Write32(Relocs[e - i - 1].r_word1); + Write32(Relocs[e - i - 1].MRE.r_word0); + Write32(Relocs[e - i - 1].MRE.r_word1); } } |