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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-10-22 11:07:15 -0700 |
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| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-10-22 11:27:36 -0700 |
| commit | 48f57138be55a939afc64d357f7b26220206127a (patch) | |
| tree | 2ca3176f861ebfc0ae3f34aa6552471db6dd0e2b /llvm/lib/MC/MCDisassembler/Disassembler.cpp | |
| parent | 19ca80ef0575b376e135271c7d44799803407941 (diff) | |
| download | llvm-48f57138be55a939afc64d357f7b26220206127a.zip llvm-48f57138be55a939afc64d357f7b26220206127a.tar.gz llvm-48f57138be55a939afc64d357f7b26220206127a.tar.bz2 | |
[AMDGPU] Allow tied operand subreg folding
Turns out it makes sense, contrarily to what comment said.
Differential Revision: https://reviews.llvm.org/D69287
Diffstat (limited to 'llvm/lib/MC/MCDisassembler/Disassembler.cpp')
0 files changed, 0 insertions, 0 deletions