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author | Jason Molenda <jmolenda@apple.com> | 2014-11-12 01:11:36 +0000 |
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committer | Jason Molenda <jmolenda@apple.com> | 2014-11-12 01:11:36 +0000 |
commit | 229525848a2d85e5cfdcee832570c2cba3f8eaa5 (patch) | |
tree | 3f13758b6637c865a87332f17bd9aeabaf2032a6 /llvm/lib/MC/MCDisassembler/Disassembler.cpp | |
parent | 319c48eb2d03623a3f981cfd1dcce356be40acb7 (diff) | |
download | llvm-229525848a2d85e5cfdcee832570c2cba3f8eaa5.zip llvm-229525848a2d85e5cfdcee832570c2cba3f8eaa5.tar.gz llvm-229525848a2d85e5cfdcee832570c2cba3f8eaa5.tar.bz2 |
Sketch out the armv7 and arm64 core file writing support in
ObjectFileMachO. It's close but we seem to be missing some
of the memory region segments - not exactly sure how that's
happening. The register context writing into the LC_THREAD
load commands is working correctly though.
Slightly reordered the arm64 definitions in ArchSpec.cpp so
when we look for an arm64 core file definiton we're getting
a cpu subtype of CPU_ANY which we can't put in the mach
header of a core file. Make the first definition we find by
linear search have the currently correct '1' cpu subtype.
llvm-svn: 221743
Diffstat (limited to 'llvm/lib/MC/MCDisassembler/Disassembler.cpp')
0 files changed, 0 insertions, 0 deletions