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| author | Pradeep Kumar <pradeepku@nvidia.com> | 2024-08-07 20:25:45 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-07 20:25:45 +0530 |
| commit | bfef7ccf03dc072e5e076500743318b7db5b9a33 (patch) | |
| tree | 421ee52027df0785ff7d44fed49496a4b2cb7219 /llvm/lib/IR/Verifier.cpp | |
| parent | 999bab711e19b897bb7d86433f72f1b8eeaa4891 (diff) | |
| download | llvm-bfef7ccf03dc072e5e076500743318b7db5b9a33.zip llvm-bfef7ccf03dc072e5e076500743318b7db5b9a33.tar.gz llvm-bfef7ccf03dc072e5e076500743318b7db5b9a33.tar.bz2 | |
[LLVM][NVPTX] Add NVPTX codegen support for fence.proxy.tensormap (#100748)
This commit adds LLVM Intrinsics and NVPTX codegen support for
`fence.proxy.tensormap` with lit tests under fence-proxy-tensormap.ll.
Also, added Intrinsics documentation in NVPTXUsage.rst
---------
Co-authored-by: gonzalobg <65027571+gonzalobg@users.noreply.github.com>
Diffstat (limited to 'llvm/lib/IR/Verifier.cpp')
| -rw-r--r-- | llvm/lib/IR/Verifier.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp index cb4eaf8..4bcd799 100644 --- a/llvm/lib/IR/Verifier.cpp +++ b/llvm/lib/IR/Verifier.cpp @@ -6329,6 +6329,14 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) { "llvm.threadlocal.address operand isThreadLocal() must be true"); break; } + case Intrinsic::nvvm_fence_proxy_tensormap_generic_acquire_cta: + case Intrinsic::nvvm_fence_proxy_tensormap_generic_acquire_cluster: + case Intrinsic::nvvm_fence_proxy_tensormap_generic_acquire_gpu: + case Intrinsic::nvvm_fence_proxy_tensormap_generic_acquire_sys: { + unsigned size = cast<ConstantInt>(Call.getArgOperand(1))->getZExtValue(); + Check(size == 128, " The only supported value for size operand is 128"); + break; + } }; // Verify that there aren't any unmediated control transfers between funclets. |