diff options
author | Diana Picus <Diana-Magda.Picus@amd.com> | 2025-08-06 12:24:52 +0200 |
---|---|---|
committer | GitHub <noreply@github.com> | 2025-08-06 12:24:52 +0200 |
commit | 14cd1339318b16e08c1363ec6896bd7d1e4ae281 (patch) | |
tree | 1c66ebe7f415b4c9eccf0e910fb573240eac9a03 /llvm/lib/IR/Verifier.cpp | |
parent | a5d85a6ab5daf67b67da654c90adc494d37833c8 (diff) | |
download | llvm-14cd1339318b16e08c1363ec6896bd7d1e4ae281.zip llvm-14cd1339318b16e08c1363ec6896bd7d1e4ae281.tar.gz llvm-14cd1339318b16e08c1363ec6896bd7d1e4ae281.tar.bz2 |
Revert "[AMDGPU] Intrinsic for launching whole wave functions" (#152286)
Reverts llvm/llvm-project#145859 because it broke a HIP test:
```
[34/59] Building CXX object External/HIP/CMakeFiles/TheNextWeek-hip-6.3.0.dir/workload/ray-tracing/TheNextWeek/main.cc.o
FAILED: External/HIP/CMakeFiles/TheNextWeek-hip-6.3.0.dir/workload/ray-tracing/TheNextWeek/main.cc.o
/home/botworker/bbot/clang-hip-vega20/botworker/clang-hip-vega20/llvm/bin/clang++ -DNDEBUG -O3 -DNDEBUG -w -Werror=date-time --rocm-path=/opt/botworker/llvm/External/hip/rocm-6.3.0 --offload-arch=gfx908 --offload-arch=gfx90a --offload-arch=gfx1030 --offload-arch=gfx1100 -xhip -mfma -MD -MT External/HIP/CMakeFiles/TheNextWeek-hip-6.3.0.dir/workload/ray-tracing/TheNextWeek/main.cc.o -MF External/HIP/CMakeFiles/TheNextWeek-hip-6.3.0.dir/workload/ray-tracing/TheNextWeek/main.cc.o.d -o External/HIP/CMakeFiles/TheNextWeek-hip-6.3.0.dir/workload/ray-tracing/TheNextWeek/main.cc.o -c /home/botworker/bbot/clang-hip-vega20/llvm-test-suite/External/HIP/workload/ray-tracing/TheNextWeek/main.cc
fatal error: error in backend: Cannot select: intrinsic %llvm.amdgcn.readfirstlane
```
Diffstat (limited to 'llvm/lib/IR/Verifier.cpp')
-rw-r--r-- | llvm/lib/IR/Verifier.cpp | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp index f3f0ae5..ca3f148 100644 --- a/llvm/lib/IR/Verifier.cpp +++ b/llvm/lib/IR/Verifier.cpp @@ -6612,36 +6612,6 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) { "Value for inactive lanes must be a VGPR function argument", &Call); break; } - case Intrinsic::amdgcn_call_whole_wave: { - auto F = dyn_cast<Function>(Call.getArgOperand(0)); - Check(F, "Indirect whole wave calls are not allowed", &Call); - - CallingConv::ID CC = F->getCallingConv(); - Check(CC == CallingConv::AMDGPU_Gfx_WholeWave, - "Callee must have the amdgpu_gfx_whole_wave calling convention", - &Call); - - Check(!F->isVarArg(), "Variadic whole wave calls are not allowed", &Call); - - Check(Call.arg_size() == F->arg_size(), - "Call argument count must match callee argument count", &Call); - - // The first argument of the call is the callee, and the first argument of - // the callee is the active mask. The rest of the arguments must match. - Check(F->arg_begin()->getType()->isIntegerTy(1), - "Callee must have i1 as its first argument", &Call); - for (auto [CallArg, FuncArg] : - drop_begin(zip_equal(Call.args(), F->args()))) { - Check(CallArg->getType() == FuncArg.getType(), - "Argument types must match", &Call); - - // Check that inreg attributes match between call site and function - Check(Call.paramHasAttr(FuncArg.getArgNo(), Attribute::InReg) == - FuncArg.hasInRegAttr(), - "Argument inreg attributes must match", &Call); - } - break; - } case Intrinsic::amdgcn_s_prefetch_data: { Check( AMDGPU::isFlatGlobalAddrSpace( |