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| author | Jiong Wang <jiwang@tilera.com> | 2019-02-28 19:21:28 +0000 |
|---|---|---|
| committer | Jiong Wang <jiwang@tilera.com> | 2019-02-28 19:21:28 +0000 |
| commit | 3da8bcd0a06d54cc53f7fcae998fe829a6fec094 (patch) | |
| tree | 0ac549850696e6f85c46d1d75f5e265235e7c169 /llvm/lib/IR/Module.cpp | |
| parent | 37ce064082c6c8283829f206af55ff6a28e95544 (diff) | |
| download | llvm-3da8bcd0a06d54cc53f7fcae998fe829a6fec094.zip llvm-3da8bcd0a06d54cc53f7fcae998fe829a6fec094.tar.gz llvm-3da8bcd0a06d54cc53f7fcae998fe829a6fec094.tar.bz2 | |
bpf: enable sub-register code-gen for XADD
Support sub-register code-gen for XADD is like supporting any other Load
and Store patterns.
No new instruction is introduced.
lock *(u32 *)(r1 + 0) += w2
has exactly the same underlying insn as:
lock *(u32 *)(r1 + 0) += r2
BPF_W width modifier has guaranteed they behave the same at runtime. This
patch merely teaches BPF back-end that BPF_W width modifier could work
GPR32 register class and that's all needed for sub-register code-gen
support for XADD.
test/CodeGen/BPF/xadd.ll updated to include sub-register code-gen tests.
A new testcase test/CodeGen/BPF/xadd_legal.ll is added to make sure the
legal case could pass on all code-gen modes. It could also test dead Def
check on GPR32. If there is no proper handling like what has been done
inside BPFMIChecking.cpp:hasLivingDefs, then this testcase will fail.
Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
llvm-svn: 355126
Diffstat (limited to 'llvm/lib/IR/Module.cpp')
0 files changed, 0 insertions, 0 deletions