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author | Fraser Cormack <fraser@codeplay.com> | 2021-06-14 09:42:00 +0100 |
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committer | Fraser Cormack <fraser@codeplay.com> | 2021-08-17 17:56:35 +0100 |
commit | f3e9047249d05ff2fb79076dbfbbdad4a35fbc63 (patch) | |
tree | e38e3e0aaa6acb270fc91b452efc7112bb22d45a /llvm/lib/IR/IntrinsicInst.cpp | |
parent | 9a56d71f616fca17b38b403befcaf225153df301 (diff) | |
download | llvm-f3e9047249d05ff2fb79076dbfbbdad4a35fbc63.zip llvm-f3e9047249d05ff2fb79076dbfbbdad4a35fbc63.tar.gz llvm-f3e9047249d05ff2fb79076dbfbbdad4a35fbc63.tar.bz2 |
[VP] Add vector-predicated reduction intrinsics
This patch adds vector-predicated ("VP") reduction intrinsics corresponding to
each of the existing unpredicated `llvm.vector.reduce.*` versions. Unlike the
unpredicated reductions, all VP reductions have a start value. This start value
is returned when the no vector element is active.
Support for expansion on targets without native vector-predication support is
included.
This patch is based on the ["reduction
slice"](https://reviews.llvm.org/D57504#1732277) of the LLVM-VP reference patch
(https://reviews.llvm.org/D57504).
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D104308
Diffstat (limited to 'llvm/lib/IR/IntrinsicInst.cpp')
-rw-r--r-- | llvm/lib/IR/IntrinsicInst.cpp | 52 |
1 files changed, 50 insertions, 2 deletions
diff --git a/llvm/lib/IR/IntrinsicInst.cpp b/llvm/lib/IR/IntrinsicInst.cpp index 19942fa..7a7ff91 100644 --- a/llvm/lib/IR/IntrinsicInst.cpp +++ b/llvm/lib/IR/IntrinsicInst.cpp @@ -473,9 +473,15 @@ Function *VPIntrinsic::getDeclarationForParams(Module *M, Intrinsic::ID VPID, assert(isVPIntrinsic(VPID) && "not a VP intrinsic"); Function *VPFunc; switch (VPID) { - default: - VPFunc = Intrinsic::getDeclaration(M, VPID, Params[0]->getType()); + default: { + Type *OverloadTy = Params[0]->getType(); + if (VPReductionIntrinsic::isVPReduction(VPID)) + OverloadTy = + Params[*VPReductionIntrinsic::getVectorParamPos(VPID)]->getType(); + + VPFunc = Intrinsic::getDeclaration(M, VPID, OverloadTy); break; + } case Intrinsic::vp_load: VPFunc = Intrinsic::getDeclaration( M, VPID, @@ -504,6 +510,48 @@ Function *VPIntrinsic::getDeclarationForParams(Module *M, Intrinsic::ID VPID, return VPFunc; } +bool VPReductionIntrinsic::isVPReduction(Intrinsic::ID ID) { + switch (ID) { + default: + return false; +#define HANDLE_VP_REDUCTION(VPID, STARTPOS, VECTORPOS) \ + case Intrinsic::VPID: \ + break; +#include "llvm/IR/VPIntrinsics.def" + } + return true; +} + +unsigned VPReductionIntrinsic::getVectorParamPos() const { + return *VPReductionIntrinsic::getVectorParamPos(getIntrinsicID()); +} + +unsigned VPReductionIntrinsic::getStartParamPos() const { + return *VPReductionIntrinsic::getStartParamPos(getIntrinsicID()); +} + +Optional<unsigned> VPReductionIntrinsic::getVectorParamPos(Intrinsic::ID ID) { + switch (ID) { +#define HANDLE_VP_REDUCTION(VPID, STARTPOS, VECTORPOS) \ + case Intrinsic::VPID: \ + return VECTORPOS; +#include "llvm/IR/VPIntrinsics.def" + default: + return None; + } +} + +Optional<unsigned> VPReductionIntrinsic::getStartParamPos(Intrinsic::ID ID) { + switch (ID) { +#define HANDLE_VP_REDUCTION(VPID, STARTPOS, VECTORPOS) \ + case Intrinsic::VPID: \ + return STARTPOS; +#include "llvm/IR/VPIntrinsics.def" + default: + return None; + } +} + Instruction::BinaryOps BinaryOpIntrinsic::getBinaryOp() const { switch (getIntrinsicID()) { case Intrinsic::uadd_with_overflow: |