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| author | Hsiangkai Wang <kai.wang@sifive.com> | 2021-12-16 18:12:38 +0800 |
|---|---|---|
| committer | Hsiangkai Wang <kai.wang@sifive.com> | 2021-12-27 13:59:49 +0800 |
| commit | 5d47e7d768951a7616ee19f12ef69cd50e02d230 (patch) | |
| tree | e66ef4ff91eca1938a59bc69fb29cd5108da6996 /llvm/lib/IR/DIBuilder.cpp | |
| parent | 6441536c27cfac46e4a6c5801dc01d5bdcf200c2 (diff) | |
| download | llvm-5d47e7d768951a7616ee19f12ef69cd50e02d230.zip llvm-5d47e7d768951a7616ee19f12ef69cd50e02d230.tar.gz llvm-5d47e7d768951a7616ee19f12ef69cd50e02d230.tar.bz2 | |
[RISCV] Convert whole register copies as the source defined explicitly.
The implicit defines may come from a partial define in an instruction.
It does not mean the defining instruction and the COPY instruction have
the same vl and vtype. When the source comes from the implicit defines,
do not convert the whole register copies to vmv.v.v.
Differential Revision: https://reviews.llvm.org/D115866
Diffstat (limited to 'llvm/lib/IR/DIBuilder.cpp')
0 files changed, 0 insertions, 0 deletions