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authorCraig Topper <craig.topper@gmail.com>2017-02-18 07:07:50 +0000
committerCraig Topper <craig.topper@gmail.com>2017-02-18 07:07:50 +0000
commita505169ca522b8ca6f55ccb6e712c67f5233c9fc (patch)
tree076fee62d510144b905efebd4615c91912312fe2 /llvm/lib/IR/AutoUpgrade.cpp
parentb70afdb5e8ac7958d242d45b90cf3531973c0f4f (diff)
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[AVX-512] Remove 128/256-bit masked fp max/min intrinsics. Upgrade them to legacy unmasked intrinsics and select instructions.
llvm-svn: 295543
Diffstat (limited to 'llvm/lib/IR/AutoUpgrade.cpp')
-rw-r--r--llvm/lib/IR/AutoUpgrade.cpp38
1 files changed, 38 insertions, 0 deletions
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index ee96c92..a2c4cc4 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -158,6 +158,14 @@ static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) {
Name == "avx512.mask.sub.pd.256" || // Added in 4.0
Name == "avx512.mask.sub.ps.128" || // Added in 4.0
Name == "avx512.mask.sub.ps.256" || // Added in 4.0
+ Name == "avx512.mask.max.pd.128" || // Added in 4.1
+ Name == "avx512.mask.max.pd.256" || // Added in 4.1
+ Name == "avx512.mask.max.ps.128" || // Added in 4.1
+ Name == "avx512.mask.max.ps.256" || // Added in 4.1
+ Name == "avx512.mask.min.pd.128" || // Added in 4.1
+ Name == "avx512.mask.min.pd.256" || // Added in 4.1
+ Name == "avx512.mask.min.ps.128" || // Added in 4.1
+ Name == "avx512.mask.min.ps.256" || // Added in 4.1
Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0
Name.startswith("avx512.mask.psll.d") || // Added in 4.0
Name.startswith("avx512.mask.psll.q") || // Added in 4.0
@@ -1520,6 +1528,36 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1));
Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
CI->getArgOperand(2));
+ } else if (IsX86 && (Name.startswith("avx512.mask.max.p") ||
+ Name.startswith("avx512.mask.min.p"))) {
+ bool IsMin = Name[13] == 'i';
+ VectorType *VecTy = cast<VectorType>(CI->getType());
+ unsigned VecWidth = VecTy->getPrimitiveSizeInBits();
+ unsigned EltWidth = VecTy->getScalarSizeInBits();
+ Intrinsic::ID IID;
+ if (!IsMin && VecWidth == 128 && EltWidth == 32)
+ IID = Intrinsic::x86_sse_max_ps;
+ else if (!IsMin && VecWidth == 128 && EltWidth == 64)
+ IID = Intrinsic::x86_sse2_max_pd;
+ else if (!IsMin && VecWidth == 256 && EltWidth == 32)
+ IID = Intrinsic::x86_avx_max_ps_256;
+ else if (!IsMin && VecWidth == 256 && EltWidth == 64)
+ IID = Intrinsic::x86_avx_max_pd_256;
+ else if (IsMin && VecWidth == 128 && EltWidth == 32)
+ IID = Intrinsic::x86_sse_min_ps;
+ else if (IsMin && VecWidth == 128 && EltWidth == 64)
+ IID = Intrinsic::x86_sse2_min_pd;
+ else if (IsMin && VecWidth == 256 && EltWidth == 32)
+ IID = Intrinsic::x86_avx_min_ps_256;
+ else if (IsMin && VecWidth == 256 && EltWidth == 64)
+ IID = Intrinsic::x86_avx_min_pd_256;
+ else
+ llvm_unreachable("Unexpected intrinsic");
+
+ Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID),
+ { CI->getArgOperand(0), CI->getArgOperand(1) });
+ Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
+ CI->getArgOperand(2));
} else if (IsX86 && Name.startswith("avx512.mask.pshuf.b.")) {
VectorType *VecTy = cast<VectorType>(CI->getType());
Intrinsic::ID IID;