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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-01-15 14:37:34 -0500 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-01-18 14:08:36 -0500 |
| commit | 82de129ab8f723ba94d0026b54d76b11b2a9e4f9 (patch) | |
| tree | 5faad9b1501af4433ac826a015166a9c0588bece /llvm/lib/IR/AutoUpgrade.cpp | |
| parent | ea27adb45b780e32d996d9c85f932a71f3e068ba (diff) | |
| download | llvm-82de129ab8f723ba94d0026b54d76b11b2a9e4f9.zip llvm-82de129ab8f723ba94d0026b54d76b11b2a9e4f9.tar.gz llvm-82de129ab8f723ba94d0026b54d76b11b2a9e4f9.tar.bz2 | |
AMDGPU: Remove llvm.amdgcn.alignbit and handle bitcode upgrade to fshr
Diffstat (limited to 'llvm/lib/IR/AutoUpgrade.cpp')
| -rw-r--r-- | llvm/lib/IR/AutoUpgrade.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp index 6dd607a..5aa3b30 100644 --- a/llvm/lib/IR/AutoUpgrade.cpp +++ b/llvm/lib/IR/AutoUpgrade.cpp @@ -727,6 +727,13 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { Name == "arm.cde.vcx3qa.predicated.v2i64.v4i1") return true; + if (Name == "amdgcn.alignbit") { + // Target specific intrinsic became redundant + NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::fshr, + {F->getReturnType()}); + return true; + } + break; } |