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| author | Craig Topper <craig.topper@intel.com> | 2018-09-25 23:28:24 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-09-25 23:28:24 +0000 |
| commit | d8c68840c894344791b311a09cbce32a0ac18164 (patch) | |
| tree | 644cf80dac4b61aaa6288d41c45cee819515c89b /llvm/lib/ExecutionEngine/Orc/ThreadSafeModule.cpp | |
| parent | 3ff077706452ac21b2194754a6580f69cde157da (diff) | |
| download | llvm-d8c68840c894344791b311a09cbce32a0ac18164.zip llvm-d8c68840c894344791b311a09cbce32a0ac18164.tar.gz llvm-d8c68840c894344791b311a09cbce32a0ac18164.tar.bz2 | |
[X86] Add some more movmsk test cases. NFC
These IR patterns represent the exact behavior of a movmsk instruction using (zext (bitcast (icmp slt X, 0))).
For the v4i32/v8i32/v2i64/v4i64 we currently emit a PCMPGT for the icmp slt which is unnecessary since we only care about the sign bit of the result. This is because of the int->fp bitcast we put on the input to the movmsk nodes for these cases. I'll be fixing this in a future patch.
llvm-svn: 343045
Diffstat (limited to 'llvm/lib/ExecutionEngine/Orc/ThreadSafeModule.cpp')
0 files changed, 0 insertions, 0 deletions