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| author | Alex Bradbury <asb@lowrisc.org> | 2018-10-06 06:09:46 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2018-10-06 06:09:46 +0000 |
| commit | 639df9e4c0279d75ff39108a669ee99d60a05cca (patch) | |
| tree | 790806ecae1bbce1327a370746267623269fae3c /llvm/lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp | |
| parent | 251ee083a3e1259ab68887f08162e68c4127c81a (diff) | |
| download | llvm-639df9e4c0279d75ff39108a669ee99d60a05cca.zip llvm-639df9e4c0279d75ff39108a669ee99d60a05cca.tar.gz llvm-639df9e4c0279d75ff39108a669ee99d60a05cca.tar.bz2 | |
[RISCV] Compress addiw rd, x0, simm6 to c.li rd, simm6
A pattern was present for addi rd, x0, simm6 but not addiw which is
semantically identical when the source register is x0. This patch addresses
that, and the benefit can be seen in rv64c-aliases-valid.s.
llvm-svn: 343911
Diffstat (limited to 'llvm/lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp')
0 files changed, 0 insertions, 0 deletions